Path: utzoo!mnetor!uunet!steinmetz!sunset!oconnor
From: oconnor@sunset.steinmetz (Dennis M. O'Connor)
Newsgroups: comp.arch
Subject: Re: RPM-40 microprocessor @ 40 MHz; dat
Message-ID: <9727@steinmetz.steinmetz.UUCP>
Date: 29 Feb 88 18:04:11 GMT
References: <1642@mips.mips.COM>
Sender: news@steinmetz.steinmetz.UUCP
Reply-To: sunset!oconnor@steinmetz.UUCP
Organization: GE Corporate R&D Center
Lines: 47

An article by aglew@ccvaxa.UUCP says:
] 
] ..> Prefix instructions in the GE RPM-40
] 
] I like this idea.
] [...]
] I particularly like how it begins to let the instruction set get independent
] of the register size (so long as people do not expect 1<<32 == 0)
] 
] A question, though: how would you compare PREFIX to an instruction SHIFT and
] OR --  SHOR r,lit ::== r := (r<<14)|lit?

PREFIX builds immidiate values that can then be added, ored,
subtracted or whatever to anything you like. It does not use
a user register to do this (minor win). And it does NOT access
the register file, or use the ALU. In a pipelined system
this is significant : PREFIX as implimented in RPM40 have no latency
problems (major win). SHOR would have latency problems.

] PREFIX always seems to eventually
] require a specification for one of several literal fields it is extending,
] plus it requires state to be saved on interrupts, which leans towards 
] assembling the constant in a register.

RPM40 instructions only have one field that can possibly be an
immediate operand, why more ? Any operations on two constants should
be done at compile or load time, I think. Given you have a
reverse-subtract instruction ( normal = op1-op2, reverse = op2-op1 )
I don't see the need for two "immidiate-able" fields.

Yes, the prefix register needs to be saved on a context switch, and in
fact has to have a old value saved. This is not really a big deal.

]     On the other hand, you can always build a decoder that never puts prefix
] into a register at all, but takes prefix and the prefixed instruction as
] one packet. This is nice, and makes it a pity to require the register write.

This is a good idea, especially if you can fetch instructions faster
than you can execute (non-PREFIX) instructions.

] Andy "Krazy" Glew. Gould CSD-Urbana.    1101 E. University, Urbana, IL 61801   


--
    Dennis O'Connor			      UUNET!steinmetz!sunset!oconnor
		   ARPA: OCONNORDM@ge-crd.arpa
   (-: The Few, The Proud, The Architects of the RPM40 40MIPS CMOS Micro :-)