Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!decwrl!decvax!mcnc!gatech!udel!rochester!cornell!batcomputer!itsgw!imagine!pawl3.pawl.rpi.edu!jesup
From: jesup@pawl3.pawl.rpi.edu (Randell E. Jesup)
Newsgroups: comp.arch
Subject: Re: RPM-40 microprocessor @ 40 MHz; dat
Message-ID: <444@imagine.PAWL.RPI.EDU>
Date: 29 Feb 88 09:46:48 GMT
References: <1642@mips.mips.COM> <28200110@ccvaxa>
Sender: news@imagine.PAWL.RPI.EDU
Reply-To: beowulf!lunge!jesup@steinmetz.UUCP
Organization: RPI Public Access Workstation Lab - Troy, NY
Lines: 26

In article <28200110@ccvaxa> aglew@ccvaxa.UUCP writes:
>>	All the machines listed above are designed so that 'Core ISA' (a
>>generic RISC assembly language, designed by Dr Gross of CMU) can be translated
>>to their native assembly languages.
>
>Okay, what about this MIPS-like ISA? Will it be assembly language only,
>or binary? Will it be possible to run some form of program intermediate
>between C and actual assembly through a translator to move between these
>families - and will third party software vendors distribute that portable
>form?

	Core ISA is an assembly language for a non-existant machine.  It
is fairly 'RISCy', but includes things like multiply (integer and FP) as
single ops, etc.  It has no relation to ANY existant hardware at all, and was
designed explicitly for the Darpa MIPS project.

	Anything distributed in Core ISA is portable (at least potentially).
All the machines mentioned have Core_ISA->their_assembler translators.
However, I suspect most stuff will be distributed in source (the compilers
produce Core ISA, that's the point of it).  Assembler modules should all be
written in Core as well.

     //	Randell Jesup			      Lunge Software Development
    //	Dedicated Amiga Programmer            13 Frear Ave, Troy, NY 12180
 \\//	beowulf!lunge!jesup@steinmetz.UUCP    (518) 272-2942
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