Path: utzoo!mnetor!uunet!lll-winken!lll-lcc!ames!hao!boulder!sunybcs!bingvaxu!leah!itsgw!imagine!pawl19.pawl.rpi.edu!jesup From: jesup@pawl19.pawl.rpi.edu (Randell E. Jesup) Newsgroups: comp.arch Subject: Re: 16 & 32 bit vs 32 bit only instructions for RISC. Message-ID: <449@imagine.PAWL.RPI.EDU> Date: 1 Mar 88 05:54:58 GMT References: <9651@steinmetz.steinmetz.UUCP> <9678@steinmetz.steinmetz.UUCP> <2574@im4u.UUCP> <2116@saturn.ucsc.edu> Sender: news@imagine.PAWL.RPI.EDU Reply-To: beowulf!lunge!jesup@steinmetz.UUCP Organization: RPI Public Access Workstation Lab - Troy, NY Lines: 23 In article <2116@saturn.ucsc.edu> haynes@ucscc.UCSC.EDU (Jim Haynes) writes: >I'm glad somebody brought this up, and while we're also at it let's debate >the value of including 16 bit data types in RISC machines. A variety >of data sizes slows a machine down almost as much as a variety of >instruction sizes. I was rather surprised to see that Sun included >16-bit data in SPARC in this day and age of cheap memory. 8-bit data >has the obvious utility for character strings; but do we really need >16-bit integers anymore? One reason should be enough: compatibility. If you want another: Ram space. Ram, especially for RISC computers, is less than cheap. Priced any 20-ns SRAMs lately? Also note that DRAM prices are goin UP lately, in contradiction to all established precedent. And no, being able to load and store halfwords doesn't really slow a machine down. All internal operations can be done in natural word size. // Randell Jesup Lunge Software Development // Dedicated Amiga Programmer 13 Frear Ave, Troy, NY 12180 \\// beowulf!lunge!jesup@steinmetz.UUCP (518) 272-2942 \/ (uunet!steinmetz!beowulf!lunge!jesup) BIX: rjesup (-: The Few, The Proud, The Architects of the RPM40 40MIPS CMOS Micro :-)