Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!amdahl!amdcad!tim
From: tim@amdcad.AMD.COM (Tim Olson)
Newsgroups: comp.arch
Subject: Re: RISC is a nasty no-no!
Message-ID: <20602@amdcad.AMD.COM>
Date: 1 Mar 88 07:44:48 GMT
References: <179@wsccs.UUCP> <3530@killer.UUCP> <7507@apple.Apple.Com> <1721@mips.mips.COM>
Reply-To: tim@amdcad.UUCP (Tim Olson)
Organization: Advanced Micro Devices
Lines: 37

In article <1721@mips.mips.COM> hansen@mips.COM (Craig Hansen) writes:
| 1) In AMD's performance models, which memory model is used?
| 	For full clock rate systems, I don't see how you could
| 	resonably build the direct partial-word addressed machine.
| 	[The MIPS processors perform the required shifting/extracting
| 	at full clock rate on the processor chip, and so directly
| 	handles partial-word operands without additional hardware.]

We use the "full-word load/store with extract/insert instructions"
model.

| 2) Which memory model does the compiler generate?

All of our compilers default to the above-mentioned model.  Pragmas (in
the dpANS-tracking (can't really say ANSI, yet, can we ;-) compiler
allow code for the second model to be generated.

| 	What effect does this lack of architectural specificity
| 	have on software compatibility? I presume that I can't
| 	do anything to make code that uses direct partial-word
| 	addressing work on a machine that has only full-word addressing.

We have stated many times that one of the main design philosophies
behind the 29000 was to provide usable mechanisms, not dictate policies.
If you wish to run at the current 25MHz and add some external logic to
directly perform byte and half-word accesses, fine.  We provide those
hooks for you.  However, we felt that it was much more important to
speed up *all* memory accesses (by providing direct load-forwarding)
rather than slow all of them down through shift-mux, sign-or-zero extend
logic which most of the time isn't required.

To answer your question directly -- if you want to be portable, you use
the full-word, extract/insert model, since it works on all systems.

	-- Tim Olson
	Advanced Micro Devices
	(tim@amdcad.amd.com)