Path: utzoo!mnetor!uunet!steinmetz!davidsen
From: davidsen@steinmetz.steinmetz.UUCP (William E. Davidsen Jr)
Newsgroups: comp.arch
Subject: Re: RPM-40 microprocessor @ 40 MHz; dat
Message-ID: <9737@steinmetz.steinmetz.UUCP>
Date: 1 Mar 88 17:35:32 GMT
References: <1642@mips.mips.COM> <28200110@ccvaxa> <444@imagine.PAWL.RPI.EDU>
Reply-To: davidsen@crdos1.UUCP (bill davidsen)
Organization: General Electric CRD, Schenectady, NY
Lines: 21

In article <444@imagine.PAWL.RPI.EDU> beowulf!lunge!jesup@steinmetz.UUCP writes:
| [...]
| 	Core ISA is an assembly language for a non-existant machine.  It
| is fairly 'RISCy', but includes things like multiply (integer and FP) as
| single ops, etc.  It has no relation to ANY existant hardware at all, and was
| designed explicitly for the Darpa MIPS project.
| 
| 	Anything distributed in Core ISA is portable (at least potentially).
| All the machines mentioned have Core_ISA->their_assembler translators.

If it clarifies the situation, ISA is functionally similar to the old
UCSD P-system, and I don't see any technical reason why it couldn't be
interpreted instead of translated and compiled.

For history bufs, the original "B" language compiler compiled to P-code,
which was then used to generate assembler. We had a P-code interpreter
on several machines.
-- 
	bill davidsen		(wedu@ge-crd.arpa)
  {uunet | philabs | seismo}!steinmetz!crdos1!davidsen
"Stupidity, like virtue, is its own reward" -me