Path: utzoo!mnetor!uunet!lll-winken!lll-lcc!pyramid!csg
From: csg@pyramid.pyramid.com (Carl S. Gutekunst)
Newsgroups: comp.arch
Subject: Re: RISC is a nasty no-no!
Message-ID: <16012@pyramid.pyramid.com>
Date: 1 Mar 88 19:32:56 GMT
References: <179@wsccs.UUCP> <3530@killer.UUCP> <7507@apple.Apple.Com>
Organization: Pyramid Technology Corp., Mountain View, CA
Lines: 18

In article <7507@apple.Apple.Com> bcase@apple.UUCP (Brian Case) writes:
>Now, if you meant arbitrary byte *alignment,* then yeah, but the 29K isn't
>unique there. Note that the Pyramid machines are little endian (aren't they?).

No, the Pyramid CPU is big-endian, like the 68020. Alignment is restricted to
natural boundaries, except that doubles need only be 32-bit aligned. Binary
operations are always performed on 32-bit or 64-bit objects, but the load and
store instructions can reference 8-bit, 16-bit, or 32-bit words; loads can be
with or without sign-extension. An unaligned version of the Pyramid was done
as a special for HHB Systems, many eons ago; it needed an extra clock tick per
memory reference to rotate the word into place. Some odd timings happened too
it part of the load was in cache, and part caused a cache miss.

I find all the flamage about aligned operations in the SPARC amusing; Pyramid
went through the same flamage some years ago. Having grown up on machines that
forced alignment, I thought the objections were pretty silly then. Still think
they're silly now.

<csg>