Path: utzoo!utgpu!water!watmath!clyde!rutgers!mcnc!ece-csc!ncrcae!ncr-sd!crash!pnet01!haitex
From: haitex@pnet01.cts.com (Wade Bickel)
Newsgroups: comp.sys.amiga
Subject: Re: 68030, cacheing, DMA devices
Message-ID: <2473@crash.cts.com>
Date: 3 Feb 88 13:16:41 GMT
Sender: news@crash.cts.com
Organization: People-Net [pnet01], El Cajon CA
Lines: 25

sean@ms.uky.edu (Sean Casey) writes:
>
>The problem that people have brought up is that a DMA device
>will screw up a system running a data cache.  Since the 68030
>has an onboard data cache, enabling it would screw up things for
>an Amiga, which has several DMA devices.
>
>It seems to me that the chip designers would have considered this.  *I*
>would have considered it.  Surely the onboard MMU can be told that certain
>pages of memory are not to be cached.  Could someone who has the specs
>for the processor check this out?
>


          Ahh, It was my understanding the cach is internal to the 69030.




                                                                     Wade.


UUCP: {cbosgd, hplabs!hp-sdd, sdcsvax, nosc}!crash!pnet01!haitex
ARPA: crash!pnet01!haitex@nosc.mil
INET: haitex@pnet01.CTS.COM