Path: utzoo!mnetor!uunet!oddjob!hao!husc6!ut-sally!nather
From: nather@ut-sally.UUCP (Ed Nather)
Newsgroups: comp.sys.ibm.pc
Subject: Re: Segmented vs. linear architectures
Message-ID: <10477@ut-sally.UUCP>
Date: 25 Feb 88 15:15:47 GMT
References: <31@vsi.UUCP> <1032@amadeus.TEK.COM>
Distribution: comp
Organization: U. Texas CS Dept., Austin, Texas
Lines: 26
Keywords: 80x86, segmentation, linear, architecture

In article <1032@amadeus.TEK.COM>, jamesa@amadeus.TEK.COM (James Akiyama) writes:
> 
> I think the biggest drawback to the 8086, 80286 segments are their 64K boundary
> limits.  This is what causes all the memory model headaches.  This was, for the
> most part, fixed in the 80386 if you are willing to lose downward compatibility
> (to the older processors).
> 
> In summary, which architecture is appropriate is very dependent on your
> particular application.
> 

I agree.  I've just completed the "port" of a real-time application program,
originally written for the Nova computers, to the 808x series.  The display
is live (animated) and requires a circular data buffer, which is a real
pain to implement at display refresh speeds.  However, by choosing the
buffer length as 64K and assigning it to a separate segment, I was able to
let the segmenting hardware do the "wrap" for me, at no cost in speed.

Specialized, sure.  But as the man said ...


-- 
Ed Nather
Astronomy Dept, U of Texas @ Austin
{allegra,ihnp4}!{noao,ut-sally}!utastro!nather
nather@astro.AS.UTEXAS.EDU