Path: utzoo!mnetor!uunet!lll-winken!lll-lcc!ptsfa!pacbell!att-ih!ihnp4!inuxc!iuvax!pur-ee!uiucdcs!uxc.cso.uiuc.edu!ccvaxa!aglew
From: aglew@ccvaxa.UUCP
Newsgroups: comp.arch
Subject: Re: RPM-40 microprocessor @ 40 MHz; dat
Message-ID: <28200116@ccvaxa>
Date: 1 Mar 88 16:23:00 GMT
References: <1642@mips.mips.COM>
Lines: 8
Nf-ID: #R:mips.mips.COM:1642:ccvaxa:28200116:000:513
Nf-From: ccvaxa.UUCP!aglew    Mar  1 10:23:00 1988


>	Ever seen a multiply or divide as 1 instruction in a RISC?  No, of
>course they are not there.  No direct support on CPU for them either.  I will
>say more on this issue when the FPU is formally announced.  You can do them
>in the CPU in software if you want, takes a few cycles though.

If your customers spend time doing multiplies or divides, then your RISC
designer will put them in. Cray is the only "RISCy" machine that is widely
known with multiply that springs to mind, though. Same for floating point.