Path: utzoo!mnetor!uunet!lll-winken!lll-lcc!ames!pasteur!ucbvax!hplabs!pyramid!prls!mips!hansen From: hansen@mips.COM (Craig Hansen) Newsgroups: comp.arch Subject: Re: 16 & 32 bit vs 32 bit only instructions for RISC. Message-ID: <1757@mips.mips.COM> Date: 3 Mar 88 00:20:55 GMT References: <2574@im4u.UUCP> <9740@steinmetz.steinmetz.UUCP> <7538@apple.Apple.Com> Lines: 44 In article <9740@steinmetz.steinmetz.UUCP> sungoddess!oconnor@steinmetz.UUCP writes: >There is NO intrinsic reason 16-bit instructions would decode slower than >32-bit instructions. In fact, they can ultimately decode FASTER : >the fewer bits your decoder has to look at, the faster it can be. >Barring other complications of course. >Dedicating 64 pins purely to instruction fetch (assuming a Harvard >architecture) is quite a lot of a rather scarce resource. Sure >you wanna do this on a micro ? I guess I've been kicking around the RISC world too long, because I've heard these arguments all before, when people were saying RISC machines weren't going to be any faster than CISC machines, and they were just as wrong then as they are now. Instruction bandwidth is important, but not so important that you should go back to compacted instructions. 32-bit instructions aren't much larger than 16-bit instructions, particularly when a register-allocating compiler is used, and the benefit to permitting parallel decoding of instructions with register fetching is a tremendous win. Generally, optimized MIPS code about 10% to 50% larger than "optimized" VAX code, as generated by 4.3 UNIX, and is often equal or smaller in size than optimized 68k code, as generated by Sun compilers. Here's some data for text size for these machines, noting that the same source code is used for all machines. However, since the libraries may be different, and the MIPS machine has a large page size, the data on small benchmarks is a litle distorted: mips sun3 vax awk 61k 106k 34k ccom 193k 156k 120k compress 29k 25k 14k diff 45k 33k 25k hspice 860k 729k 635k wolf 266k 303k 212k ...those big 32-bit instructions don't look so bad next to the machines design for compact encodings... -- Craig Hansen Manager, Architecture Development MIPS Computer Systems, Inc. ...{ames,decwrl,prls}!mips!hansen or hansen@mips.com 408-991-0234