Path: utzoo!mnetor!uunet!lll-winken!lll-lcc!ames!hao!noao!arizona!naucse!rrr
From: rrr@naucse.UUCP (Bob Rose )
Newsgroups: comp.arch
Subject: Re: SPARC and the Slow Multiply Instruction
Message-ID: <599@naucse.UUCP>
Date: 3 Mar 88 18:15:12 GMT
References: <1157@pasteur.Berkeley.Edu>
Organization: Northern Arizona University, Flagstaff, AZ
Lines: 20
Summary: multiply can be faster

In article <1157@pasteur.Berkeley.Edu>, rudell@ic.uucp (Richard Rudell) writes:
> SPARC has a multiply-step instruction for unsigned multiply; it takes
> 32 instructions plus a minimum of another 8 (even if both operands are
> positive) to check for negative arguments in a signed multiply.
               ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
This one always gets me. Assuming you are multipling two values that are
the same size (i.e. 32bits) and storing them back in the same size
(i.e. 32bits again) then you do not have to check for negative arguments
if you are using a 2's complement machine that ignores overflow.
There is a mathmatical proof for this.

I have a 68010 machine (68010 does not have a 32bit multiply) and
in the multiply routine they do that stupid check for negative arguments,
after removing the check the routine ran 40% faster.

Maybe my math degree isn't worthless after all.

Robert R. Rose
Northern Arizona University, Box 15600
Flagstaff, AZ 86011
                    .....!ihnp4!arizona!naucse!rrr