Path: utzoo!mnetor!uunet!steinmetz!sunset!oconnor
From: oconnor@sunset.steinmetz (Dennis M. O'Connor)
Newsgroups: comp.arch
Subject: Re: RPM-40 microprocessor @ 40 MHz; dat
Message-ID: <9792@steinmetz.steinmetz.UUCP>
Date: 4 Mar 88 20:59:59 GMT
References: <9758@steinmetz.steinmetz.UUCP>
Sender: news@steinmetz.steinmetz.UUCP
Reply-To: oconnor%sungod@steinmetz.UUCP
Organization: GE Corporate R&D Center
Lines: 70

An article by bcase@apple.UUCP (Brian Case) says:
] In article <9758@steinmetz.steinmetz.UUCP> sungoddess!oconnor@steinmetz.UUCP writes:
] >"Popular RISCs" don't have any latency on
] >ALU ops because they ARE ( No Dennis don't say it, no, no ... )
] >SLOW SLOW SLOW ! (ARRGGHH he said it ! BAD DENNIS, BAD <whack>)
] 
] Boy, I must say I don't know what you are thinking.  Do you mean they are
] slow because they don't have 40 MHz versions?  Or do you mean that they
] are slow in terms of VAX-equivalent MIPS?

At least the former, and perhaps the latter, but I obviosly mainly
MEANT it HUMOUROUSLY. Couldn't you tell.

] If the former, then just wait a little while.
]  There are probably more 40 MHz RISC machines in most
] other companies labs than there are in yours (I strongly suspect the MIPS
] guys have them, for example), but they won't let them out because of
] characterization and specification limitations (that is, they may only
] be 40 MHz (or even more) at room temperature).

The RPM40 runs 40MIPS, all the time, all instructions (even NOPS :-),
at up to 85C and down to 4.5V. It's currently running 40MIPS on
a wire-wrap board. We haven't said it won't or doesn't run
faster, 40MIPS is what it was designed to do, using conservative
design rules. What, do you think we designed it willy-nilly and
then cranked up the clock till it stopped working ? Sorry,
that trick doesn't cut it at GE.

Speculating about how fast other people are running in the labs is
hogwash : until I see it in ISSCC or another credible forum, I don't care.
So, name another 32-bit CMOS micro from ISSCC. Or anywhere.
Besides, how do you know WE're not running something faster in our lab.
But we don't compare an existing, published device with vaporware.

]  If the latter, I think
] you are wrong.  To be less opaque, I think that the RPM40 VAX-equivalent
] MIPS is no better than, say, a 25 MHz Am29000 or a 16 MHz MIPS (both
] with caches, you understand; and I am not saying that the 25 MHz 29000 is
] the same as a 16 MHz MIPS).  We're talking integer here.

I think YOUR wrong, and I am in a better position to say so.
Don't you think you're being a little quick with your evaluation ?
How much do you know about RPM40 ?

Look, even I don't know how much real "VAX-equivalent" performance
this chip has, except that it has LOTS, so how can anyone else ?
If anyone knew, I'd know, either because I determined it or
because someone would tell me (hi Pete, hi Phil, if you're there :-)

I hope to have dhrystone numbers soon. Not the greatest benchmark,
but I'm doing it on my own time, so there's a limit on what I can
do. But at least we'll have something, so we'll see. Small benchmarks,
like acker, show performance as just over 4 times a Sun3/260, and
over 25 times the performance I got on our VAX11/785. I'M NOT IMPLYING THAT
ACKER IS A VALID MEASURE OF ANYTHING. Just the facts here, ma'am,
no conclusions. ACKER is probably NOT a fair evaluation of a VAX.

But please : I know "MIPS" is in disrepute as a measure of
perfromance, but please DON'T use MHz as a measure of instruction
execution rate. RPM40 @ 40MHz = 40MIPS. MC68020 @ 16MHz < 4MIPS.
MIPS R2000 @ 16MHz = 8MIPS. AMD29000 @ 25MHz = ....
Get the point ? MHz is a frequency, not an execution rate.
Why don't we all use MIPS ("average" or "peak" qualified as needed)
for instruction execution rate, MHz for clock speed, and
VIPS ( VAX-11/780-Indexed Performance Standard :-) or whatever
for some measure of general-purpose computing power ?
--
    Dennis O'Connor			      oconnor%sungod@steinmetz.UUCP
		   ARPA: OCONNORDM@ge-crd.arpa
   (-: The Few, The Proud, The Architects of the RPM40 40MIPS CMOS Micro :-)