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From: jesup@pawl23.pawl.rpi.edu (Randell E. Jesup)
Newsgroups: comp.arch
Subject: Re: RPM-40 microprocessor @ 40 MHz; dat
Message-ID: <475@imagine.PAWL.RPI.EDU>
Date: 5 Mar 88 07:52:10 GMT
References: <1642@mips.mips.COM> <9727@steinmetz.steinmetz.UUCP> <1729@winchester.mips.COM>
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In article <1729@winchester.mips.COM> mash@winchester.UUCP (John Mashey) writes:
>I.e., any high-performance system is likely to make use of
>register-bypassing anyway, so that:
>	r = r op literal
>	r = r op r
>has zero intervening latency (the performance penalty of a
>cycle's latency for such things is large).

>-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>

	Two reasons why one might not have register bypassing:

1)  Slows down critical path.  Any finely tuned risc CPU will most probably
have it's cycle time determined by the latency through the ALU.  Using a
loopback of ALU results might result (depending on layout, tech, etc) in up
to a 20% slowdown in the ALU, plus increase the chip area and layout
problems.  This doesn't mean a loopback is a loss necessarily, but that it
does have a measurable cost which must be weighed against the benefits.

2)  In combination with (1) above, I'm not sure that having a one-cycle delay
in ALU results causes any large loss.  A good reorganizer can fill those
latencies, or move the ALU op forward into, for example, a load delay.  In
high-speed (> 15 Mhz) RISCs (and maybe slower ones as well), load delays
are usually the determining factor, or a large part of it.  What studies do you
have that compare RISC's with 1 cycles ALU delays and 0-cycle?  I'd like to
see anything you can drag up.

3)  If one is doing much FP, the CPU is usually waiting on results from the
FPU anyway, so you may not lose anything.  (I know I said 2, but....)

     //	Randell Jesup			      Lunge Software Development
    //	Dedicated Amiga Programmer            13 Frear Ave, Troy, NY 12180
 \\//	beowulf!lunge!jesup@steinmetz.UUCP    (518) 272-2942
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(-: The Few, The Proud, The Architects of the RPM40 40MIPS CMOS Micro :-)