Path: utzoo!mnetor!uunet!husc6!rutgers!mtune!mtund!rgh
From: rgh@mtund.ATT.COM (Ronald Hiller)
Newsgroups: comp.arch
Subject: Re: RISC is a nasty no-no!
Message-ID: <931@mtund.ATT.COM>
Date: 2 Mar 88 02:03:56 GMT
References: <179@wsccs.UUCP: <696@nuchat.UUCP> <284@scdpyr.UUCP> <25699@linus.UUCP>
Reply-To: rgh@mtund.UUCP (Ronald Hiller)
Organization: AT&T Lincroft NJ USA
Lines: 15
Summary: Integer Multiplication on a RISC

In article <25699@linus.UUCP> bs@gauss.UUCP (Robert D. Silverman) writes:
>There's something about RISC architectures in general that I find 
>confusing. Since they (read SPARC or equivalent) have no integer multiply
>instructions, any code which has a fair number of these is going to
>be slow.
more complaints about lack of multiply instruction and effect on accessing
2-D arrays.

It turns out that shift/add (or shift/add/subtract) sequences are really
quite fast when multiplication by a constant is required.  As an example, 
on an 8086 (I know...I shouldn't compare it with SPARC!!), you can nearly
always do a multiply by a constant faster using the shift add sequence then
using the multiply instruction.

Ron