Xref: utzoo comp.lang.c:7884 comp.arch:3838
Path: utzoo!mnetor!uunet!husc6!bbn!rochester!cornell!batcomputer!pyramid!prls!mips!earl
From: earl@mips.COM (Earl Killian)
Newsgroups: comp.lang.c,comp.arch
Subject: Re: Bit Addressable Architectures
Message-ID: <1799@gumby.mips.COM>
Date: 7 Mar 88 23:39:00 GMT
References: <11702@brl-adm.ARPA> <243@eagle_snax.UUCP> <2245@geac.UUCP> <1988Mar3.182645.703@utzoo.uucp> <7374@sol.ARPA>
Lines: 12
In-reply-to: crowl@cs.rochester.edu's message of 4 Mar 88 17:26:51 GMT


In article <7374@sol.ARPA> crowl@cs.rochester.edu (Lawrence Crowl) writes:

   A bit addressable machine would allow us to use single bits,
   nibbles, BCD, etc.  with much greater ease.  Besides, bit
   addressability seems "right".  (I know, "right" isn't a rational
   statement!)

It's more right in certain environments.  For example the TI 34010
graphics processor is bit-addressed, which is a good match for pixel
operations.  Also, when we have 64-bit addresses, using bit addresses
will make sense (this is independent of whether you have bit
load/stores).