Path: utzoo!mnetor!uunet!husc6!mailrus!ames!pasteur!ucbvax!hplabs!pyramid!voder!apple!bcase
From: bcase@Apple.COM (Brian Case)
Newsgroups: comp.arch
Subject: Re: Harvard Architecure
Message-ID: <7614@apple.Apple.Com>
Date: 9 Mar 88 20:07:26 GMT
References: <8803011911.AA06922@decwrl.dec.com> <3460011@hpsrla.HP.COM> <1071@PT.CS.CMU.EDU>
Reply-To: bcase@apple.UUCP (Brian Case)
Organization: Apple Computer Inc, Cupertino, CA
Lines: 19

In article <1071@PT.CS.CMU.EDU> lindsay@K.GP.CS.CMU.EDU (Donald Lindsay) writes:
>In article <3460011@hpsrla.HP.COM> brucek@hpsrla.HP.COM (Bruce Kleinman) 
> writes about the 68030:
>>Ahh, those massive 256-Byte caches are really going to speed this puppy up :-)

Talking about 68030.

>
>Actually, it will. Remember, the CDC 6600 got a win from an "instruction
>stack" of 480 bits ! 
>
>All in all, a clear improvement. I don't hear any suggestions as to a better
>use for the silicon.

A little birdie with an EE degree told me that you can expect maybe a 20%
improvement over a 68020 at the same clock rate.  An improvement, yes, but
a better use of silicon might have been some on-chip floating point.  Or
how about more pins so as to expose the harvard architecture to the external
world?