Path: utzoo!mnetor!uunet!husc6!mailrus!nrl-cmf!ames!claris!apple!bcase
From: bcase@Apple.COM (Brian Case)
Newsgroups: comp.arch
Subject: Re: Harvard Architecure
Message-ID: <7675@apple.Apple.Com>
Date: 14 Mar 88 19:49:48 GMT
References: <7614@apple.Apple.Com> <2781@korppi.tut.fi>
Reply-To: bcase@apple.UUCP (Brian Case)
Organization: Apple Computer Inc, Cupertino, CA
Lines: 16

In article <2781@korppi.tut.fi> pv@tut.fi (Vuorimaa Petri Kalevi) writes:
>Floating point unit takes much more space than instruction cache.
>Actually more room than memory management unit and instruction cache
>together. You must also remember that there's just not that much
>more space on the chip: Motorola had to drop the number of address
>translation cache entries from 64 (MC68851) to 22 (MC68030) to fit MMU in.
>At this moment it's just not possible to add on-chip floating point unit
>to MC68020. So, Motorola made the best choice they could.

Yeah, there is some problem with chip area.  However, the T800 transputer
has on-chip floating point plus a 2K byte ram plus 4 links plus....  There
are some floating-point assists that might have fit.

One thing is for sure, Mot has never been know for having the best
process technology, er, I mean densest anyway.  This may be changing
somewhat.