Path: utzoo!mnetor!uunet!husc6!mit-eddie!uw-beaver!cornell!batcomputer!itsgw!imagine!pawl16.pawl.rpi.edu!jesup From: jesup@pawl16.pawl.rpi.edu (Randell E. Jesup) Newsgroups: comp.arch Subject: Re: Instruction Scheduling Message-ID: <559@imagine.PAWL.RPI.EDU> Date: 20 Mar 88 03:02:52 GMT References: <12513@sgi.SGI.COM> <3300024@uiucdcsm> Sender: news@imagine.PAWL.RPI.EDU Reply-To: beowulf!lunge!jesup@steinmetz.UUCP Organization: RPI Public Access Workstation Lab - Troy, NY Lines: 42 In article <3300024@uiucdcsm> grunwald@uiucdcsm.cs.uiuc.edu writes: > >The paper by Wall keeps the Front-end/Back-end strategy, it just moves >the point of actual code generation to a later phase of the binding. >The linkers all use the IR generated by the front end. The last stage >is a translation of the linked IR to the machine code. This is a good way to do things (if I understand you), as linking BEFORE final optimization allows true global optimization. I'm not familiar with that paper, where was it published (I'm no longer at GE, so I don't see these things unless I look). >The last stage (IR -> Assembler) performs global register allocation. The >advantages are that you have better information about other subroutines >at link time, and you can pass subroutine parameters in registers. You can pass stuff in registers without this, it's just less efficient. The added information DOES allow some really nice optimizations, especially on something like the RPM-40, where branches, etc are variable length. >If you look at the improvements listed in tables 2, 4 and 5, you see that >the run-time information contibutes about as much improvement as >register coloring, but the two combined rarely perform significantly better >than one or the other. > >This leads one to question the advantages of > (1) Doing both > (2) Bothering with recording the run-time data Without having seen the paper, it's hard to tell, but it sounds like Wall is just doing register allocation late, not other types. Also, was he modeling a CISC or RISC? It can make a lot of difference (not that many papers for one are not totally relevant to the other, a point that is easy to overlook (since doing the statistical analysis, etc, is a major project). // Randell Jesup Lunge Software Development // Dedicated Amiga Programmer 13 Frear Ave, Troy, NY 12180 \\// beowulf!lunge!jesup@steinmetz.UUCP (518) 272-2942 \/ (uunet!steinmetz!beowulf!lunge!jesup) BIX: rjesup (-: The Few, The Proud, The Architects of the RPM40 40MIPS CMOS Micro :-)