Path: utzoo!mnetor!uunet!mcvax!ukc!reading!onion!cf-cm!mch
From: mch@computing-maths.cardiff.ac.uk (Major Kano)
Newsgroups: comp.arch
Subject: Re: Yield of core-MIPS chips [MIPSCo yield? && Other Issues]
Message-ID: <229@cf-cm.UUCP>
Date: 16 Mar 88 18:35:14 GMT
References: <1806@obiwan.mips.COM> <2904@omepd>
Reply-To: mch@computing-maths.cardiff.ac.uk (Major Kano)
Followup-To: comp.arch
Organization: University College Cardiff, Wales, United Kingdom
Lines: 91
Keywords: Query 386 intel memory protection management model
Summary: Is the Intel memory model safe from NO-ONE ?!?

In article <2904@omepd> mcg@iwarpo3.UUCP (Steve McGeady) writes:
>
>This opens a very interesting can of worms.  I would like to ask MIPSCo
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
(* Absolutely *)
(* stuff deleted *)
>And lest I be accused of pursuing a hidden agenda, here it is:
>
>	This newsgroup (comp.arch) tends to focus on a very narrow band
>	of issues concerning the success (intellectually and commercially)
>	of architectures and their implementations.  The predominant
>	issues discussed here are performance, "capability", and
>	architectural elegance.  All too seldom do we discuss issues
>	that, ultimately are more important to the success of an
>	architecture:
>
>		-> bug-free, working silicon
>		-> yield (affects price, availability)
(*
   And how. On of the first nieveties (forgive my spelling) that I have had
   to unlearn at College was that fantastic architectures may not be practical
   in the real world, given the avaliable process technologies.
*)
>		-> system integration issues
>			-> HW interface complexity
>			-> availability of compatible interface chips
>		-> support tools
>			-> availability of compilers, tools
>			-> development environment
>			-> software support
>			-> debug capabilities (ICE, SW debug, others)
>		-> hardware support
>			-> demonstration designs
(* Interesting; good points *)
(* Stuff deleted *)
>It can't be elegance of design, for (e.g.) the 80386 and the MIPSco processor
>are each somewhat inelegant in their own ways (for those who don't wish to
>fill in the blanks, segmentation and register model in the former case,
                     ^^^^^^^^^^^^              ^^^^^

                     ** WHAT THE $@#@++%%& HELL ?!? **


   Wow ! And I thought Ray Coles (writes for Practical Computing, a UK
   Magazine) had it in for Intel !

   Agreeing, as I do, that the register model doesn't have enough of
   them, and that even the '386 isn't regular enough, I though that the 
   feature of the '386 that made it so TECHNICALLY advanced
   (IBM compatibility not withstanding :-) ** WAS ** its memory management
   and protection model. The 32-bit within-segment addresses are what
   people have been waiting for for ages. I would question the fact that
   only 16 bit selectors are avaliable, but I defy anyone to come up, in the
   near or intermediate future, with an Intel-style memory model that is
   better than Intel's, without opening up a whole can of voracious
   memory-eating killer-worms at the descriptor table level. If you don't
   know what I mean by that, pretend for a moment, that YOU were the
   person who had to come up with the byte/page granularity
   kludge in order to make 4GB segments fit in a DT entry.
   (Maybe that person (or team) could comment themselves, if they use the net).

   What does everyone think ? As a computer architecture junkie, I would
   be very interested; as the Intel segments seem (to me) to come in for
   a lot of flack every so often; I just didn't expect it to come from
   an Intel employee .
*)
(* Stuff deleted *)
>than to have designed a processor that was used only in a particular
>$100,000 software engineering workstation.
(*
   WOW ! That is the sort of processor I personally WOULD like to
   work on once I've had enough experience; although I would also like
   to see such a CPU/chip set sold everywhere, of course.
*)
>
>I've rambled on long enough.  Now, to Mr. Johnson's answer about MIPSCo
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
(* So have I. Hope someone comments on all this. Bye ! *)
(* Stuff deleted *)

-mch

PS: I would be grateful to anyone who POSTS replies or flames or whatever
about this if they would also e-mail me, as I go home for the Easter Vacation
in two day's time, and our system manager does expire articles every so often !
Thanks in advance, -mch
-- 
Martin C. Howe, University College Cardiff | "You actually program in 'C'
mch@vax1.computing-maths.cardiff.ac.uk.    |  WITHOUT regular eye-tests ?!"
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My cats know more about UCC's opinions than I do.| MOSH! In the name of ANTHRAX!