Path: utzoo!mnetor!uunet!husc6!uwvax!dogie!uwmcsd1!ig!agate!pasteur!ames!pacbell!att-ih!ihnp4!inuxc!iuvax!pur-ee!uiucdcs!uxc.cso.uiuc.edu!ccvaxa!aglew
From: aglew@ccvaxa.UUCP
Newsgroups: comp.arch
Subject: Prefix and Trap Addressibility
Message-ID: <28200128@ccvaxa>
Date: 21 Mar 88 06:38:00 GMT
Lines: 43
Nf-ID: #N:ccvaxa:28200128:000:2017
Nf-From: ccvaxa.UUCP!aglew    Mar 21 00:38:00 1988


..> The RPM-40's prefix instruction.

Some coding I've been doing recently has got me thinking
about the RPM-40's prefix instruction, used to generate
long literals.

Q: can an interrupt occur between the prefix and the instruction
   that is being prefixed? On a page fault, where does the PC
   point?

Reason: I'm writing some user mode trap code (don't ask) and I
keep running into the limited addressing range problem. Gould
Powernodes have only 16 bit offset fields; with base registers
you can address anywhere in memory, but when you don't have a base
register, eg. on a trap, you can only use BR0=0, meaning that you
can only address locations in the first 16 bit's worth, 64K,
of memory - locore.

I call this the "limited addressing range" variant of the 
"limited literal size" problem. Some people call it the "base
register" problem, but in fact it occurs on any machine that
has a literal field less than a full size address - eg RISC I and II.

You can, of course, synthesize any arbitrary address by loading the high
part into a register, shifting, then loading the low part, but in trap
code you have to save at least one register before you can do this.
Since you can only do this into locore, locations in locore become a
rather precious resource. Managing that resource, for an OS, of course,
isn't too much trouble - but I want to write a trap routine that vectors
directly to user code with no OS intervention. 
    For the moment, I "steal" locore locations for a priviliged process;
for an unpriviliged process I have to assume base register usage 
conventions, which reduces the generality of the code.
    Even within the OS, managing locore has always seemed an unnecessary
pain to me.

The prefix instruction might seem to be the answer to this problem,
if an interrupt routine can generate an arbitrary address, using a 
prefix, to store anywhere in memory. The prefix instruction would then
have to be stateless, hence uninterruptible.

I know, I'm making a mountain out of a molehill.