Path: utzoo!mnetor!uunet!husc6!bbn!rochester!cornell!batcomputer!chow
From: chow@batcomputer.tn.cornell.edu (Christopher Chow)
Newsgroups: comp.arch
Subject: Re: Harvard Architecure
Message-ID: <4135@batcomputer.tn.cornell.edu>
Date: 23 Mar 88 19:24:15 GMT
References: <8803011911.AA06922@decwrl.dec.com> <3460011@hpsrla.HP.COM> <1071@PT.CS.CMU.EDU> <7614@apple.Apple.Com> <2594@pdn.UUCP> <373@ma.diab.UUCP>
Reply-To: chow@tcgould.tn.cornell.edu (Christopher Chow)
Organization: Cornell Theory Center, Cornell University, Ithaca NY
Lines: 24

In article <373@ma.diab.UUCP> pf@ma.UUCP (Per Fogelstr|m) writes:
|In article <2594@pdn.UUCP> alan@pdn.UUCP (0000-Alan Lovejoy) writes:
||The 68020 **CONSISTENTLY** benchmarks twice as fast with the instruction
||cache turned on (compared to its being turned off).  ...............
||
||--alan@pdn
|
|From our experience tests has shown that turning off the internal cache in the
|"020" results in a 20% slowdown if the external memory don't have wait states.
|
|So Your figure must be from a system with slow external memory, right ??

My own tests have also shown that on a Mac II, the 68020 instruction cache
results in a 20% performance change.  (I think the Mac II has 1 wait state.)


Christopher Chow
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