Path: utzoo!mnetor!uunet!husc6!mailrus!ames!pacbell!att-ih!ihnp4!ho95e!wcs From: wcs@ho95e.ATT.COM (Bill.Stewart.) Newsgroups: comp.arch Subject: Re: Yield of core-MIPS chips [MIPSCo yield? && Other Issues] Message-ID: <2089@ho95e.ATT.COM> Date: 29 Mar 88 06:33:40 GMT References: <2904@omepd> <751@esunix.UUCP> Reply-To: wcs@ho95e.UUCP (46323-Bill.Stewart.,2G218,x0705,) Organization: AT&T Bell Labs 46133, Holmdel, NJ Lines: 42 In article <751@esunix.UUCP> sedwards@esunix.UUCP (Scott Edwards) writes: :RISC's are great for specific applications where the instruction set is :optimized for that specific application and someone is willing to pay the :extra $$$$$ for more, fast memory and optimizing compilers. What about :architectures designed for software reliability like SWARD and iapx432 You've got it backwards - the theory of CISC is that you really need binary-coded-decimal-graphics-interpreters because your COBOL programs draw a lot of pie charts, and need them in hardware to go fast. RISC says make the hardware do the few simple things *everybody* needs, and do them elegantly and real fast. That way it's easy to write good compilers, and fast enough to do your custom work in software. The main arguments between CISC and RISC people are whether simple and elegant is enough faster to justify the lack of complex features, and whether it really *is* easier to write compilers good enough that you don't need hand-coded assembler. RISC architectures are probably more reliable, since there's less complexity. You *always* need optimizing compilers - compare Microsoft C 5.0 with the earliest 8086 compilers - it's taken a long time to produce decent CISC code. As far as memory speed is concerned, note that *data* memory is accessed at about the same rate, because you're doing the same work, and most calculations are to registers rather than RAM. Code memory speed has to be higher on RISCs, since you generate more code, but that's what instruction caches are for. You also mentioned graphics processors and the like. Certainly when you have very specialized applications that you use a lot, it's worth building custom hardware. AT&T's DSP-32 digital signal processor does 8 MFLOPS of add and multiply, plus I/O, because speech processing needs fast crunching; it can get away with minimal interrupt-handling and small address spaces because it's not trying to be a general-purpose chip. Similarly, several of the commercial graphics chips do BITBLTs real fast, but typically use an 80186 or 68000 to deal with communications. But for general applications, like hacking integers and characters, RISC is usually better. -- # Thanks; # Bill Stewart, AT&T Bell Labs 2G218, Holmdel NJ 1-201-949-0705 ihnp4!ho95c!wcs # So we got out our parsers and debuggers and lexical analyzers and various # implements of destruction and went off to clean up the tty driver...