Xref: utzoo comp.lang.c:8694 comp.arch:4150
Path: utzoo!mnetor!uunet!husc6!cmcl2!rutgers!mcnc!duke!dfk
From: dfk@duke.cs.duke.edu (David Kotz)
Newsgroups: comp.lang.c,comp.arch
Subject: Re: Languages vs. machines (was Re: The need for D-scussion)
Message-ID: <11437@duke.cs.duke.edu>
Date: 30 Mar 88 15:03:34 GMT
References: <12176@brl-adm.ARPA> <1988Mar11.215238.976@utzoo.uucp> <1252@PT.CS.CMU.EDU>
Organization: Duke University CS Dept.; Durham, NC
Lines: 41
Summary: Exact details on TF-1

In article <1252@PT.CS.CMU.EDU>, koopman@A.GP.CS.CMU.EDU (Philip Koopman) writes:
> I believe you folks are talking about the TF-1 processor.
> The head architect of that recently gave a talk at CMU, and I think
> I can remember some of the details:
> 

Many details are available in an article in the recent issue of
"Supercomputing" magazine, supposedly the only thing out there written
about the TF-1. Try some of these specs out for size:

32,768 processors
arranged in a 40' donut
with 3000 miles of wiring in between (butterfly-style packet-switched network)
global 50MHz clock
using 2.5 Mwatts
water cooled
total 3 Tflops single-precision or 1.5 Tflops double-precision

Each processor:
single 300-pin CMOS chip has 
	50 Mips fixed-point unit
	100 Mflop float unit
	128 (32 bit) registers
	interface to switch (50 Mbytes/s)
and two 200 Mbyte/s channels to 
	4M of data RAM		(=> 128 Gbytes total)
	1M of instruction RAM

Processors are packed 8 to a board (actually 16, all are replicated).
Switch nodes are packed 16 8x8 nodes to a board (actually 32, all replicated).
In addition, the whole switch is replicated 8 times to lower contention.
The wiring is in 504 layers of 64 wires each. 

This is a BIG machine. Don't look for it under your desk anytime soon...

David Kotz
-- 
Department of Computer Science, Duke University, Durham, NC 27706
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