Path: utzoo!utgpu!water!watmath!clyde!att-cb!att-ih!pacbell!ames!lll-lcc!lll-winken!csustan!polyslo!csun!sef
From: sef@csun.UUCP (Sean Fagan)
Newsgroups: comp.arch
Subject: Motorola 88000 and others
Keywords: mc88000 RISC parallel-units
Message-ID: <1168@csun.UUCP>
Date: 2 Apr 88 18:17:30 GMT
Organization: CSU, Northridge Computer Center
Lines: 22

I was reading in some trade rag (sorry, forget which) about the MC88000,
which uses a 'scoreboard' to have up to 3 instructions executing
simultaneously (plus whatever pipelining the thing has).  Also, someone
mentioned here a few weeks ago that his company's chip was capable of doing
a floating-point divide (or multiply, I forget that and which company; may
have been MIPS) along with some other instruction, also simultaneously.
The thing I find funny is that these people seem to think that these things
are wonderful new ideas, yet I routinely work on a CDC 170 type machine,
which can do a divide, a multiply, a floating point add or subtract, an
integer add or subtract, and an address calculation, all at the same time.
Not only that, but all but the divide are pipelined so that it can start
a new operation each clock cycle (except the multiply, which needs to do it
every other cycle).  (The Cray can do more, as can the Cyber 205 and ETA 10.)
Now, after the comment, a question:  does anybody know what non-mainframes
and non-supers have parallel functional units (preferably pipelined)?
How abuot how popular these machines are, what their speeds are, etc?


-- 
Sean Fagan                   uucp:   {ihnp4,hplabs,psivax}!csun!sef
CSUN Computer Center         BITNET: 1GTLSEF@CALSTATE
Northridge, CA 91330         (818) 885-2790
"I just build fast machines."  -- S. Cray