Path: utzoo!mnetor!uunet!lll-winken!lll-tis!ames!pasteur!ucbvax!hplabs!hp-pcd!uoregon!omepd!randys
From: randys@mipon2.intel.com (Randy Steck)
Newsgroups: comp.arch
Subject: Re: Press Release: Intel announces 80960 architecture
Message-ID: <3376@omepd>
Date: 14 Apr 88 19:09:18 GMT
References: <3358@omepd> <953@ima.ISC.COM>
Sender: news@omepd
Reply-To: randys@mipon2.UUCP (Randy Steck)
Organization: Intel Corp., Hillsboro
Lines: 35
Keywords: 80960, RISC, embedded control

In article <953@ima.ISC.COM> marc@ima.UUCP (Marc Evans) writes:
>I remember a few years ago that Intel announced a processor called (I think)
>the 432...Now that I have read about this processor (80960) in some of the
>industry rags, as well as on the net, it seems to me that the 80960 is just
>a repackaged, supercharged version of the 432. Can anybody comment on this?

The iAPX432 was about as far away from the architecture of the 80960 as you
can possibly get.  The 432 is typically referenced when talking about CISC
architectures (at the extreme CISC end of the spectrum).  And there were
alot of mistakes made that really killed the performance.  Some of these
were no registers (all operations were memory-based), bit-level encoded
instructions (Huffman encoding anyone?), two-chip implementation with only
a narrow microinstruction bus between them, and extremely long
call/return/branch times since everything was done in microcode.

In other words, the 432 was a dog on performance and therefore a failure,
even though some of the architectural features may have been
interesting/useful.

The 80960 architecture is in no way related, and in fact is very close to
the other end of the spectrum (closer to the RISC end).  Many RISC ideas
have been incorporated into the processor to allow an implementation to
achieve high performance (CPU *AND* system performance).  As Glen Myers
(the architect of the 960) said in a videotape at the announcement of the
family, we feel that it is a balanced architecture with no undue emphasis
being placed on any particular area to the detriment of others.

The 960's ideas on fine-grained parallelism and complete hardware
interlocking could go a long way in future implementations.

Randy Steck
Intel Corp.
Hillsboro, Oregon

These comments are my own.  Intel would certainly disavow any agreement
with them.  What?!?  You don't believe me?  Why not call them up and ask?