Path: utzoo!mnetor!uunet!cadnetix.COM!rusty
From: rusty@cadnetix.COM (Rusty Carruth)
Newsgroups: sci.electronics
Subject: Re: Posting schematics...
Message-ID: <2317@cadnetix.COM>
Date: 6 Apr 88 19:45:36 GMT
References: <1059@PT.CS.CMU.EDU> <1332@pasteur.Berkeley.Edu> <1213@cpocd2.UUCP> <3312@tekgvs.TEK.COM> <5318@pyr.gatech.EDU>
Reply-To: rusty@cadnetix.COM (Rusty Carruth)
Distribution: na
Organization: Cadnetix Corp.,  Boulder, CO
Lines: 17
Keywords: schematics EDIF

In article <5318@pyr.gatech.EDU> styer@pyr.UUCP (Eugene Styer) writes:
>I'll throw in my $.02 on the subject.  In thinking about what to do, I came
>up with the idea of indicating each component and wire by a set of XY
>coordinates.  A wire might be represened by
>(1,1)->(1,5)->(6,5)->(6,6)
>and a transistor by something like
>2n222 base=(1,1) collector=(1.5,1.5) emitter=(1.5,.5)
>then recreating the circuit would be simply taking a piece of paper, and 
>drawing at the places indicated by the coordinates.  

Well, I started this out by liking the idea, then decided that it would be very hard to
create such a beast.  How about using a netlist format?  (I can even generate one
of those HERE!)  If we used a sort-of standard/vanilla version, we might get away
with using various different pacakges.  Seems to me that there are even PC-based
schematic capture tools which can generate and accept netlists?

Hmmm...