Path: utzoo!mnetor!uunet!littlei!intelisc!omepd!mcg
From: mcg@omepd (Steven McGeady)
Newsgroups: comp.arch
Subject: Intel 80960, Memory Mgmt, and Military parts
Message-ID: <3383@omepd>
Date: 17 Apr 88 21:53:19 GMT
References: <3358@omepd> <10320@steinmetz.ge.com> <3363@omepd> <949@ima.ISC.COM>
Reply-To: mcg@iwarpo3.UUCP (Steve McGeady)
Organization: Intel Corp., Hillsboro
Lines: 41
Keywords: 80960, RISC, embedded control


In article <949@ima.ISC.COM> johnl@ima.UUCP (John R. Levine) writes:
>In article <3363@omepd> mcg@iwarpo3.UUCP (Steve McGeady) writes:
>>>  4) what about memory management?
>>... The 80960MC implements the 80960 ... and also includes an on-chip memory
>>management unit which supports a standard virtual memory management system.
>>... This processor is available in a mil-spec package, and is targeted at
>>military and high-reliability embedded applications that require hardware
>>protection of concurrent processes.
>
>I would be fascinated to hear about high reliability embedded applications
>that use virtual memory. Seems to me you'd need a pretty artful designer to
>come up with a system that satisfies the sort of real-time constraints
>generally present in embedded systems while handling page faults.
>
>Or perhaps you could have a system with Unix, vi, and troff and X windows
>... fighter pilots can type up their reports on the way home ...
>using only an eye-tracking mouse equivalent built into the helmet. ...


John is taking a poke at me which is well-deserved.  Clearly realtime
systems will not make use of page-faulting virtual memory schemes.  However,
memory *protection* is an important aspect of high-reliability systems.
The 80960MC allows isolation of (e.g.) Ada tasks so that the amount of
interference caused by the failure of one software subsystem does not
interfere with other important subsystems.  One doesn't want an
infinite loop in the coffee-maker control program to cause the engine
controls to fail ...

I failed to mention that the 80960MC also supports some underlying support
for tasking (process) control.  This is decidely non-RISCy, I know, but
the 80960 is not an ideological processor, it is a pragmatic one.  The
forthcoming Ada compiler from Tartan Labs will use this support.

And finally, in response to someone who complained about the $2k+ price
for the 80960MC, remember that price is for a *militarized* part.  If there
is demand for a commercial part with memory management, I'm sure the
price will be competitive.

S. McGeady
Intel Corp.