Path: utzoo!mnetor!uunet!husc6!bloom-beacon!mit-eddie!bbn!uwmcsd1!ig!agate!eos!labrea!decwrl!pyramid!prls!mips!earl
From: earl@mips.COM (Earl Killian)
Newsgroups: comp.arch
Subject: Re: Proposed architecture characterization survey form
Message-ID: <2052@gumby.mips.COM>
Date: 20 Apr 88 06:15:41 GMT
References: <2048@gumby.mips.COM> <50070@sun.uucp>
Lines: 53
In-reply-to: dre%ember@Sun.COM's message of 19 Apr 88 21:28:32 GMT


In article <50070@sun.uucp> dre%ember@Sun.COM (David Emberson) writes:

   Of course, the number of cycles to do this or that is a function of the
   implementation, not the architecture.

Yes, that's why I continuously referred to "the architecture and its
implementation" in my posting.  I think the implementations are
actually more interesting than the instruction set architecture
underneath.  Good implementation is more difficult, and there's a lot
to be learned from such study.  The places where implementation and
instruction set design interact are especially interesting.  I've
noted numerous times in this forum when other designers said their
instruction set chose method X because Y was too hard when we made the
opposite choice, and vice versa.

   And none of us will supply the really interesting data--on the
   chips we haven't announced yet!

Of course.  But as soon as something new is announced, we'll have a
good way to communicate information, right?  I'm certainly not
suggesting that we take a snapshot of April 88 and never update it.

(Nor am I letting the fact that MIPS' unannounced designs are oodles
better than the current ones from talking about our current ones :-)

   Earl, if the purpose of this exercise is to prove that the R3000
   will outbench the 16 MHz Fujitsu SPARC, then on behalf of Sun
   Microsystems I concede (assuming your published data to be
   correct--I have never seen an R3000).

That was definitely not my intent.  My purpose was as an aid to help
me keep track of what's going on out in the wide world, because it's
getting tough with all the different machines and implementations.
The recent Moto/Intel announcements were the real spur.  I started
making a list of the features for everything I knew about, and
realized there were a lot of blanks.  I thought comp.arch would be
both helpful in filling in the blanks, and interested in the results.

   How about adding to the list "total dollars being invested in new
   implementations?"  And don't forget "number of engineers worldwide
   working on this architecture."

   Ah, this is going to be one fun war--and we all win!

One remark in the spirit of your posting: you seem to be suggesting
that you prefer comp.arch not discuss the Sun/Fujitsu SPARC
implementation because it's uncompetitive with respect to the others,
and instead you would rather wait for a worthier SPARC entrant.
If so, fine.  In the meantime would you care to comment on what data
is relevant for when you do have something to talk about?
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