Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!ember!dre
From: dre%ember@Sun.COM (David Emberson)
Newsgroups: comp.arch
Subject: Re: Proposed architecture characterization survey form
Message-ID: <50217@sun.uucp>
Date: 20 Apr 88 19:46:07 GMT
References: <2048@gumby.mips.COM> <50070@sun.uucp> <2052@gumby.mips.COM>
Sender: news@sun.uucp
Lines: 43
Summary: Architecture comparisons



Earl, I would like to apologize for being cynical about your intent.  On
further reflection, I think there is some value to this cataloguing of
RISCS--if only, as you say, to communicate information.  We are all in
search of the Holy Instruction Set which solves all our problems of bit
efficiency, ease of implementation, etc. so such a list may actually inspire
someone to insight on the problem of architecture comparisons.

One thing which is missing from the list (which might fall under the category
of "parameters of implementation technology") and which is the thing which
does make the Fujitsu SPARC competitive (if you will forgive my flirting with
delivery of a commercial message for the moment) is price.  As such, I think
the component compares favorably when price-performance rather than performance
alone is considered.  And no, I do not wish to limit anyone's discussion of
SPARC or anything else.  It would certainly be nice, though, if we could talk
about "the latest stuff."  Some of you MIPS guys are very dear friends of mine
and it would be nice to compare notes--although it would not surprise me if
you knew in detail what was going on here anyway!  I had an interviewee the
other day describe one of my most secret activities in great detail!  It seems
he had a previous interview at one of our "technology partners."  Ah, the
joys of the free enterprise system...

I vaguely remember hearing someone about ten years ago give a talk on the
subject of architecture comparison.  Unfortunately I do not remember who it
was, but they defined two measures of an architecture, R and S.  The R measure
was a metric of the number of register references and the S measure was a
metric of the number of memory references (storage) in a given piece of code.
Presumably a high R/S is desirable, although this is far from certain in the
presence of write-back caches.  In any case, these indicators are independent
of implementation technology.  It would be nice if we could develop some such
set of metrics which would allow architectures to be compared for efficiency
and ease of implementation.  I haven't a clue as to how to measure something
for ease of implementation--I'll leave that to some enterprising person.  I am
in full agreement with your statement that implementations are the most
interesting.  We can get real numbers from them and identify real areas for
improvement.

On another subject, does anyone know how the 88200 cache consistency scheme
works?

			Dave Emberson
			(dre@sun.com)