Path: utzoo!mnetor!uunet!husc6!purdue!decwrl!granite!paulr From: paulr@granite.dec.com (Paul Richardson) Newsgroups: comp.arch Subject: Re: Proposed architecture characterization survey form Message-ID: <222@granite.dec.com> Date: 21 Apr 88 14:43:36 GMT References: <2048@gumby.mips.COM> <49983@sun.uucp> <20123@pyramid.pyramid.com> <221@granite.dec.com> Reply-To: paulr@granite.UUCP (Paul Richardson) Organization: DEC Workstation Systems Engineering Lines: 62 In article <221@granite.dec.com> allen@decwrl.dec.com (Allen Akin) writes: >In article <20123@pyramid.pyramid.com> csg@pyramid.pyramid.com (Carl S. Gutekunst) writes: >> >>DEC's big RISC engine goes by the code name "Titan." It is something around 10 >>MIPS, up to 10 tightly-coupled CPUs. It's supposed to be a big secret, so don't >>spead this around. :-) >> >> > >Just to clarify things for the masses: > >Titan is a research RISC machine designed and implemented several years >ago by DEC's Western Research Lab in Palo Alto. It's been mentioned in >a number of papers published by WRL (see Wall and Powell's paper in >ASPLOS II, for example) so feel free to spread it around. :-) > >Allen More Titan History: I was on a team of engineers trying to turn the research Titan into Titan the product.Obviously we never succeeded mostly because of political reasons,some valid,some not valid: Titan: 'Risc' Machine designed to run at 40 ns,I believe they are running at 42. Scalar processor consisted of datapath,and 64kb i and d caches (split) line size was 4 longwords Seperate Coprocessor 4 banks of 64 32 general purpose registers bit registers. 128 Mbytes of main store Entire processor (icache,dcache,datapath and floating point coprocessor) were contructed from 24 pin dip components (100K ecl). Processor boards were approx 20" x 28",something like that 7 slot I/O bay supported disks(currentl RA81s),enet,serial lines, and fiber optic link. Machine was designed as single user workstation for members of WRL. Languages at the time included modulea-2,C,and Fortran (I think they have lisp up now too) A system (above hardware running 4.3 BSD) performed on an aggregate basis,of 10 times a 780. Fully funtional protos were completed 2 years ago. I think it is still the fastest running uniprocessor in DEC Aprroximately same compiler technology as Mips.The papers mentioned by Allen should clue you in.