Path: utzoo!mnetor!uunet!husc6!yale!mfci!root
From: root@mfci.UUCP (SuperUser)
Newsgroups: comp.arch
Subject: Re: RAM Question:
Message-ID: <357@m3.mfci.UUCP>
Date: 21 Apr 88 12:28:21 GMT
References: <1005@iitmax.UUCP> <1988Apr20.195805.25922@gpu.utcs.toronto.edu>
Reply-To: colwell@m3.UUCP (Robert Colwell)
Distribution: comp.arch
Organization: Multiflow Computer Inc., Branford Ct. 06405
Lines: 50

In article <1988Apr20.195805.25922@gpu.utcs.toronto.edu= sarathy@gpu.utcs.UUCP (Rajiv Sarathy) writes:
=
=In article <1005@iitmax.UUCP= cs450edf@iitmax.UUCP (edward federmeyer) writes:
==
==...
=='The only dumb question in the unasked question...'
==
==So, I have read ALOT of ads in for example Computer Shopper and other
==computer mags that mention "0 Wait State" and "1 Wait State".  What do
==they mean by these terms? ...
==...
==Ed Federmeyer
=
=A 'wait state' is the number of clock cycles that a computer must wait before
=proceeding with the next instruction.  This wait occurs at different frequencies
=on different machines.
=
=While waiting, the computer refreshes RAM.  Naturally, 0 wait-state means that
=the architecture of the motherboard allows software to run uninterrupted even
=when the computer is refreshing RAM (fastest), and 2 wait-states mean that the
=software which is currently being run must wait for a few nanoseconds (slower).
=
=However the buyer mustn't judge two computers based solely on wait-states.  For
=instance, a 16MHz machine with 0 wait-states is going to be much slower than a
=similarly equipped 25MHz machine with 2 wait-states.
=
=Raj Sarathy, Undergraduate,
=University Of Toronto, Department of Computer Science

Whoa there, Raj.  That's no definition of wait-states that I've ever
heard.

A wait-state is a clock cycle that the cpu spends stalled because it
needs a memory operation to complete before it can continue, and
main memories of any decent size are always slower than the cpu.

Suppose your micro kicks off a memory load, and suppose that
transferring the address to memory, performing the memory access, and
returning the results takes the equivalent of 4 cpu clock cycles.
The cpu will have nothing to do after sending out the request, so it
must wait until the memory finishes the access.  

There are many other nuances to this, and every manufacturer does
this a different way (there are even ways of getting real work done
during the waits), but wait-states have nothing to do with refresh.

Bob Colwell            mfci!colwell@uunet.uucp
Multiflow Computer
175 N. Main St.
Branford, CT 06405     203-488-6090