Path: utzoo!mnetor!uunet!oddjob!ncar!ames!pasteur!ucbvax!decwrl!pyramid!voder!apple!bcase From: bcase@Apple.COM (Brian Case) Newsgroups: comp.arch Subject: Re: RAM Question: Message-ID: <8711@apple.Apple.Com> Date: 21 Apr 88 18:29:56 GMT References: <1005@iitmax.UUCP> <1988Apr20.195805.25922@gpu.utcs.toronto.edu> Reply-To: bcase@apple.UUCP (Brian Case) Distribution: comp.arch Organization: Apple Computer Inc, Cupertino, CA Lines: 44 In article <1988Apr20.195805.25922@gpu.utcs.toronto.edu> sarathy@gpu.utcs.UUCP (Rajiv Sarathy) writes: > >In article <1005@iitmax.UUCP> cs450edf@iitmax.UUCP (edward federmeyer) writes: >>So, I have read ALOT of ads in for example Computer Shopper and other >>computer mags that mention "0 Wait State" and "1 Wait State". What do >>they mean by these terms? ... >A 'wait state' is the number of clock cycles that a computer must wait before >proceeding with the next instruction. > >While waiting, the computer refreshes RAM. Naturally, 0 wait-state means that >the architecture of the motherboard allows software to run uninterrupted even >when the computer is refreshing RAM (fastest), and 2 wait-states mean that the >software which is currently being run must wait for a few nanoseconds (slower). Omygod, the blind leading the blind. Refresh is not the cause of wait states. Wait states happen when the minimum memory access time is too slow to allow the processor to proceed after a memory access is requested. The name "wait state" is pretty much a hold-over from the earliest days of micro- procesors; anyone remember counting "T-states" on the i8080? So, a wait state occurs when the microprocessor must wait for the memory to finish satisfying an access request; in such a case, the memory control logic and/or the microprocessor go into a "wait state." So, if the memory is fast enough to satisfy a request without causing the microprocessor to wait at all, it is popularly referred to as a "0-wait state" design, if one wait state must be inserted after a memory request, they call it a "1-wait state" design, etc. Note that with more modern microprocessors, the fact that memory is "slower than the microprocessor" might matter much less due to overlap between instruction execution and memory access. Even the 68020 can do this to a degree on memory writes. >However the buyer mustn't judge two computers based solely on wait-states. For >instance, a 16MHz machine with 0 wait-states is going to be much slower than a >similarly equipped 25MHz machine with 2 wait-states. Your warning is correct, but your example is quite possibly wrong. I would wager that the 16 MHz 0-wait state design is the same as the 25 MHz, 2-wait state design. In fact, if you read and believe the advertisements of the PC clone makers, a 10 MHz, 0-wait state design is as fast as a 12 MHz, 1-wait state design, a 12-MHz, 0-wait state design is as fast as a 16 MHz, 2-wait state design, etc. Clearly, the validity of such claims depends on a factors such as the program being run and the microprocessor in question (8088, 8086, 80286, 80386). Hope this helps the original question-asker.