Path: utzoo!mnetor!uunet!lll-winken!lll-lcc!ames!oliveb!pyramid!prls!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: Re: hardware support of reference and change bits Message-ID: <2081@winchester.mips.COM> Date: 26 Apr 88 07:07:11 GMT References: <1458@hubcap.UUCP> <1647@alliant.Alliant.COM> Reply-To: mash@winchester.UUCP (John Mashey) Organization: MIPS Computer Systems, Sunnyvale, CA Lines: 50 Keywords: page replacement reference bit change bit In article <1647@alliant.Alliant.COM> jeff@alliant.UUCP (Jeff Collins) writes: .... > When the hardware sets a reference and/or modified bit in the TLB, the > operating system does not know that the bit is being set, it is > automatic. Given that the software does not know that the bit is set, > there is no way to tell the other processors to perform an invalidate. .... > > The setting/clearing of the referenced and modified bits are not a big > deal (ie. they don't cause a lot of bus traffic). This is because it > will only cause traffic the first time it is changed, and that is a > very small percentage of the overall number of processor reads and > writes. At least some current machines, especially several of the RISC systems (HP Precision, MIPS, AMD 29K) use TLBs that do software refill, and trap on transitions [such as attempts to set the modify bit]. Current UNIXes often forbid the hardware from writing modify bits directly, in order to do copy-on-write processing. In other words, they go around a hardware feature that often adds substantial complexity to a design, in order to do what they really want. Current UNIXes almost always want to trap the first write to a page, unless the first reference to a page is a write, not a read, os that the kernel knows that the page should be allocated as dirty in the first place. Frequencies of transition between clean-but-writable and dirty vary according to the UNIX variant. The cases are as follows: a) 1st reference to a data page is a read, so that a copy of the data is brought into memory. Later a write occurs. b) 1st reference to a BSS page is a read. Create a page of zeroes. Later, a write occurs. c) Fork with copy-on-write is used. Copy the page tables, mark everything read-only, then copy the pages when written. d) Use copy-on-write for mapped files, for buffer cache, etc. e) User attempts to write to a truly nonwritable data page. If you look at these cases, you find either that the frequency is low (on the order of disk event rates), or that there is substantial overhead (like zeroing a page), or that you're about to kill the process anyway. Although this has nothing particular to do with RISCs, a number of them (such as the HP Precision, MIPS R2000, and AMD 29K, at least) do TLB handling in software, and generally trap modifies rather than letting the hardware do it. -- -john mashey DISCLAIMER: UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086