Path: utzoo!mnetor!uunet!lll-winken!lll-lcc!ames!umd5!uvaarpa!babbage!mac3n
From: mac3n@babbage.acc.virginia.edu (Alex Colvin)
Newsgroups: comp.arch
Subject: Re: 80960 IO
Message-ID: <253@babbage.acc.virginia.edu>
Date: 20 Apr 88 14:27:14 GMT
References: <3358@omepd> <10320@steinmetz.ge.com> <40@radix> <11026@mimsy.UUCP> <3364@tekgvs.TEK.COM>
Organization: University of Virginia
Lines: 10

> Caching is not the only problem with I/O devices.  It is (was?) common
> practice for status registers to be cleared upon being read.  Thus burst
> mode is a no-no with such registers.

All too common a practice!  Stop it!  If I'd 'a wanted it cleared I'd 'a done
a read-and-clear!  Would you do this to a processor register?

This just means that I've got to keep a shadow copy somewhere.  Why not
keep status in the status register?

					mac the nai"f