Path: utzoo!utgpu!water!watmath!clyde!att!att-ih!pacbell!ames!ucsd!sdcsvax!ucsdhub!jack!nusdhub!rwhite
From: rwhite@nusdhub.UUCP (Robert C. White Jr.)
Newsgroups: comp.arch
Subject: RISC  a short answer??
Message-ID: <1036@nusdhub.UUCP>
Date: 28 Apr 88 01:52:08 GMT
Organization: National University, San Diego
Lines: 28

Hi all,

	Can someone give me [short answer style] a description
of what "RISC" means.  I keep seeing all sorts of stuff about
this "processor type" in the media, but other than a translation
of "RISC == Reduced Instruction Set Chip" [or something equaly
vague] there hasen't been one decient definition of what the
term actually means.

	This may be a little simple a question, but all I realy
do is "networks, and system adminstration, sort of..."

What _IS_ a reduced instruction, and who would want less instruction
than they are paying for?	;-)
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