Xref: utzoo comp.lang.c:9763 comp.arch:4535 Path: utzoo!yunexus!geac!daveb From: daveb@geac.UUCP (David Collier-Brown) Newsgroups: comp.lang.c,comp.arch Subject: Re: volatile (in comp.lang.c) Message-ID: <2674@geac.UUCP> Date: 29 Apr 88 12:23:04 GMT Article-I.D.: geac.2674 Posted: Fri Apr 29 08:23:04 1988 References: <20345@pyramid.pyramid.com> <833@mcdsun.UUCP> <9916@tekecs.TEK.COM> <2642@geac.UUCP> <2082@winchester.mips.COM> Reply-To: daveb@geac.UUCP (David Collier-Brown) Organization: The Geac Nit-Picking Department. Lines: 43 In article <2642@geac.UUCP> daveb@geac.UUCP (David Collier-Brown) writes: | It is interesting to note that there have not been, to date, | **any** other discussion of the necessity of "volatile" et all, only | of their desirability in a given language, taking their necessity as | **a given**. In article <2082@winchester.mips.COM> mash@winchester.UUCP (John Mashey) writes: | This is an assertion of non-fact. There was such a discussion that | ran for about a week, a month or so ago, at least in comp.lang.c. | People gave examples of potential usage; some of us who have it and use | it said so; I observed that both of our kernels had about 200 | instances of volatile, and we'd miss it a lot if it weren't there. Sorry John, that's not a discussion of the necessity for such a facility. (Yes, I read your article when it was published). That your compiler-wriers believed that such was necessary **is** germane, and I'll happily agree that, if found necessary by the compiler-writers, one would be a little foolish to not use it (:-)). I reiterate: the question of the necessity of certain information for optimization purposes is: 1) in part architectural, 2) in part a question of compiler technology, and 3) open. Specifically: 1) what architectures currently use asynchronously-changing memory locations for program notification of events? DEC Vax, various CDC boxes, MIPS(tm),... 2) what other programmer-visible alternatives are there? Interrupts, event queues, (Hoare) monitors... 3) what is the state of compiler/translator technology for the new architectures, especially for parallel processing? Is the "volatile" question valid, has it been dealt with, and if so, how? VLIW, (Brinch Hansen's) Edison, Concurrent , etc... --dave c-b -- David Collier-Brown. {mnetor yunexus utgpu}!geac!daveb Geac Computers International Inc., | Computer Science loses its 350 Steelcase Road,Markham, Ontario, | memory (if not its mind) CANADA, L3R 1B3 (416) 475-0525 x3279 | every 6 months.