Path: utzoo!mnetor!uunet!lll-winken!lll-tis!mordor!sri-spam!sri-unix!garth!walter
From: walter@garth.UUCP (Walter Bays)
Newsgroups: comp.arch
Subject: Re: SPARC and multiprocessing
Message-ID: <623@garth.UUCP>
Date: 29 Apr 88 18:51:57 GMT
References: <1521@pt.cs.cmu.edu> <28200135@urbsdc> <4921@bloom-beacon.MIT.EDU> <1671@alliant.Alliant.COM>
Reply-To: walter@garth.UUCP (Walter Bays)
Organization: INTERGRAPH (APD) -- Palo Alto, CA
Lines: 20

In article <1671@alliant.Alliant.COM> jeff@alliant.UUCP (Jeff Collins) writes:
>	Given that the SPARC must use a virtual cache to get optimal
>	performance, how does one build a multiprocessor with a SPARC?
>	As far as I know, no one has solved the virtual cache coherency
>	problem yet...

Clipper uses 'bus watch' to invalidate references to stale data, when
used in multiprocessor (including CPU-IOP) modes, and when using
'copy-back' (as opposed to write-through) cache modes.  The newly
announced Motorola 88000 uses a similar scheme, called 'bus snoop'.

With SPARC, Clipper without CAMMU chips, or 88000 without CAMMU chips,
you implement your own cache, and can build whatever you choose.
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