Path: utzoo!mnetor!uunet!husc6!cmcl2!nrl-cmf!ames!oliveb!sun!gorodish!guy From: guy@gorodish.Sun.COM (Guy Harris) Newsgroups: comp.arch Subject: Re: SPARC and multiprocessing Message-ID: <51428@sun.uucp> Date: 30 Apr 88 03:33:03 GMT References: <1521@pt.cs.cmu.edu> <28200135@urbsdc> <4921@bloom-beacon.MIT.EDU> <1680@alliant.Alliant.COM> Sender: news@sun.uucp Lines: 19 > Sorry, Guy but you misunderstood the purpose of my posting. I was not > attempting to attack the SPARC. No, I didn't. I merely pointed out that you were, as far as I could tell, making an unwarranted assumption at the start of your discussion; this assumption unnecessarily colored the rest of your discussion. David Emberson of Sun has noted that there is nothing in the *architecture* that demands a virtual cache. Current *implementations* may make a virtual cache the best, or only, way to get maximum performance, but that's a different matter. If you were, in fact, referring to the current chips, rather than the SPARC architecture, I apologize. > I am simply attempting to see if anyone has given any thought the > the problem of using the SPARC with a virtual cache in a > multiprocessor. David Emberson has also already given an answer to this question; the answer is "yes, Sun has". Unfortunately, as he indicated, he's not in a position to discuss it in detail now.