Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!decwrl!nsc!voder!apple!bcase
From: bcase@Apple.COM (Brian Case)
Newsgroups: comp.arch
Subject: Re: SPARC and multiprocessing
Message-ID: <9261@apple.Apple.Com>
Date: 30 Apr 88 21:55:40 GMT
References: <1521@pt.cs.cmu.edu> <28200135@urbsdc> <4921@bloom-beacon.MIT.EDU> <1671@alliant.Alliant.COM>
Reply-To: bcase@apple.UUCP (Brian Case)
Organization: Apple Computer Inc, Cupertino, CA
Lines: 14

In article <1671@alliant.Alliant.COM> jeff@alliant.UUCP (Jeff Collins) writes:
>
>	Here's an interesting question for the SPARC guru's of the world:
>
>	Given that the SPARC must use a virtual cache to get optimal
>	performance, how does one build a multiprocessor with a SPARC?
>
>	As far as I know, no one has solved the virtual cache coherency
>	problem yet...

Read about the SPUR project being done at Berkeley.  They have a large
virtual cache, in-cache address translation (only done on misses), and
the system concept is a small (about 10) multiprocessor.  Some neat
ideas.