Path: utzoo!mnetor!uunet!husc6!cmcl2!nrl-cmf!ames!ncar!noao!arizona!mike
From: mike@arizona.edu (Mike Coffin)
Newsgroups: comp.arch
Subject: Re: SPARC and multiprocessing
Message-ID: <5286@megaron.arizona.edu>
Date: 1 May 88 19:37:56 GMT
References: <8029@pur-ee.UUCP>
Organization: U of Arizona CS Dept, Tucson
Lines: 17

From article <8029@pur-ee.UUCP>, by hankd@pur-ee.UUCP (Hank Dietz):
> I hate to add to this pile of news, but why hasn't anyone talked about the
> fact that processors like SPARC are not really designed for large-scale
> multiprocessing, e.g., they have no provision for "hiding" big, stochastic,
> memory reference delays across a log n stage interconnection network, etc.?
> [...]
> Anyone care to get a discussion along these lines going?
> 						-hankd

One machine that attacked this problem was the Denelcor HEP.  Although
it's now defunct, my impression is that its demise had little to do
with technical merit.
-- 

Mike Coffin				mike@arizona.edu
Univ. of Ariz. Dept. of Comp. Sci.	{allegra,cmcl2,ihnp4}!arizona!mike
Tucson, AZ  85721			(602)621-4252