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From: mark@hubcap.UUCP (Mark Smotherman)
Newsgroups: comp.arch,comp.edu,comp.lsi
Subject: Re: Comp. Architecture & Organization (the class)
Message-ID: <1523@hubcap.UUCP>
Date: 28 Apr 88 15:55:42 GMT
References: <3952@medusa.cs.purdue.edu>
Distribution: na
Organization: Clemson University, Clemson, SC
Lines: 63
Keywords: course texts, fundamental topics/issues
Summary: quick review of Stallings; plug for compiler view


Last semester I taught a computer architecture course using W. Stallings,
Computer Organization and Architecture, Macmillian, 1987.  The students
were CS undergrads and entering grad students without the equivalent
architecture background.  All students had the prerequisite of a logic
design / register transfer course; so, I didn't have to deal with this
aspect.

Overall, the Stallings book has the feel of a nice revision of the classic
first edition of J.P. Hayes.  (Hayes, by the way has a second edition out
now, but it retains his EE and somewhat formal perspective - e.g. Turing
machines on p. 5.)  The strengths of Stallings are:

(1) It's very readable.
(2) A brief history is included with excerpts from von Neumann's paper on
    EDVAC and a good description of the IAS machine.
(3) Computer classes `a la Bell, Mudge, and McNamara.
(4) Interconnection categories and bus structures (also `a la Bell, Mudge,
    and McNamara).
(5) Very good I/O chapter.
(6) Good discussions of instruction formats, register and CPU organizations.
(7) Data path and control signals `a la Hamacher, Vranesic, and Zaky, with
    good coverage of microprogramming and bit slice architecture.
(8) Sections on pipelining, multiprocessing, fault-tolerance, and RISC.
(9) Appendix on digital logic.

My two major complaints with the Stallings text are:

(1) The lack of a good chapter on operating system support.  Stallings has
    an overview chapter, but I didn't find it useful.  Instead, I assigned
    for reading the chapter by R.L. Sites out of the second edition of Stone's
    book.  What Sites covers well: sharing vs. separation, interrupts and
    context switching (albeit on older machines), relocation, TLBs, and page
    faults.
(2) No attention to procedure calling and activation record stack support
    in the hardware.  Even though Stallings has an overview of the VAX,
    nothing is said about the use and update of the frame pointer and
    argument pointer.  I gave a handout on the use of LINK and UNLINK on
    the MC68000 (this is covered in an example in Hayes, 2nd ed.).

I understand that Stallings is already preparing a second edition.  Ask your
book rep.

One exercise that I have found to be enlightening after studying a particular
architecture is to have the students get assembly listings from Pascal (or C
or ...) programs.  (For Turbo Pacsal, you have to use DOS debug to get a
disassembly listing.)  Lots of questions come up about "gee, why didn't the
compiler use that whizzo instruction we just studied?" and "why did the
compiler use a second register when it didn't have to?"  Good motivation to
take the compiler course.

The next time I teach architecture, I want to try to use two case studies to
tie software (OS/compiler), instruction set architecture, and implementation
issues together.  One is the use of a cache memory, which is often relegated
to being an implementation issue only.  However, there are considerations
about vitrually-addressed vs. physically-addressed caches, the existence of
a purge/sweep cache instruction, and the OS use of such an instruction.  (Not
to mention software cache protocols.)  The second study is the effect of a
pipeline as it shows through to the instruction set architecture (i.e.
delayed branches) and to the compiler (i.e. instruction scheduling).
-- 
Mark Smotherman, Comp. Sci. Dept., Clemson University, Clemson, SC 29634
INTERNET: mark@hubcap.clemson.edu    UUCP: gatech!hubcap!mark