Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!livesey
From: livesey@sun.uucp (Jon Livesey)
Newsgroups: comp.arch
Subject: Re: Proposed architecture characterization survey form
Message-ID: <51488@sun.uucp>
Date: 1 May 88 22:45:03 GMT
References: <2048@gumby.mips.COM> <3100001@hpmwtla.HP.COM> <358@ziebmef.UUCP>
Organization: Sun Microsystems, Inc. - Mtn View, CA
Lines: 70

In article <358@ziebmef.UUCP>, mcp@ziebmef.UUCP (Marc Plumb) writes:
> 
> garyb@hpmwtla.HP.COM (Gary Bringhurst) writes:
> 
> >Why has no one mentioned the Inmos Transputers?  They are certainly Risc'ish.
> 
> Sigh...
> 
>	[much deleted]
> 
> Sufficient, certainly (it's turing-equivalent), but pleasant to use??
> 
> Sorry to go on, but the RISCiness of Transputers is a fabrication of
> buzzword-happy marketroids, and I wouldn't want them to delude reasonably
> sane people.

	You make some very good points about the transputer.   Unfortunately
you went a tiny bit overboard in the last two sentences.   Pleasantness-of-
use is not an implicit guarantee for RSIC machines.    Why should it be?
The RISCiness of Transputers is not a fabrication of marketeers.   The
Transputer turns up in perfectly respectable academic surveys of RISC machines.
One reference is Tabak D. "RISC Architecture", Research Studies Press, 1987.
Tabak is Abrahams-Curiel Professor of Computer Engineering at Ben Gurion
University, Israel, and has a cross appointment at George Mason University.
Tabak is careful to explain why he includes the Transputer as a RISC machine:

	    "Although the machine language has 111 instructions, 
	(approximately as in the Pyramid or Ridge, there is only 
	a *single instruction format* [Tabak's enphasis] and a 
	very simple one."
				{page 98}

    Tabak goes on to explain the Transputer instruction format and 
instruction set, emphasising that they "*eliminate the need* for
*complicated addressing modes*" [Tabak's emphasis again].   He descibes
their "prefix", which allows any operand to be manipulated in the Operand 
Register before being used, and the "operate" code which allows an 
instruction to be applied to the operands already loaded into the 
three operand Evaluation Stack.   Clearly, this does not make for simple
or intuitive assembler language programming, but Tabak makes the comment:

	    "It should be stressed that the regular user is not
	supposed to program in the machine language [he gives a short 
	description of Occam, deleted here]"
						{page 100}

    In an introductory section, Tabak lists eight criteria for RISCness.

							Transputer
							----------
	1. Few instructions (< 100 is best)		111
	2. Few addressing modes (1 or 2)		one
	3. Few instruction formats.			one
	4. Single cycle execution.			true for 80% of inst.
	5. Memory access by load/store
		instruction only.			yes
	6. Large register set.				none, but 4k on-chip memory.
							[there are six utility regs,
							such as PC, etc.]
	7. Hardwired control unit.			no, microcoded.
	8. HLL support reflected 
			in architecture			yes

    Using Tabak's criteria, the Transputer violates one of eight, satisfies
three, at least loosely, and satisfies four more completely.   Tabak comments
that the violation of using microcode is also seen in some other systems, and 
may be forgiven by advancing technology.


Jon.