Path: utzoo!mnetor!uunet!lll-winken!lll-tis!ames!claris!apple!baum
From: baum@apple.UUCP (Allen J. Baum)
Newsgroups: comp.arch
Subject: Re: RISC != real-time control
Message-ID: <7551@apple.UUCP>
Date: 3 May 88 18:09:41 GMT
References: <1521@pt.cs.cmu.edu> <1532@pt.cs.cmu.edu> <476@pcrat.UUCP>
Reply-To: baum@apple.UUCP (Allen Baum)
Organization: Apple Computer, Inc.
Lines: 15

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[]
>In article <476@pcrat.UUCP> rick@pcrat.UUCP (Rick Richardson) writes:
>
>I'm still looking for the RISC that does ~4K (C language) Dhrystones,
>has no cache, clocks around 4 Mhz, has a 16 bit bus, can address maybe 1MB,
>is a power miser, can't do floating point, and costs no more than $15.
>

Except for the 16bit bus, the ARM chip seems to meet your qualifications.
It looks very good for controller kinds of applications. Its simple, small
(die size) and therefore, cheap. It does not require a cache, and knows how
to talk to DRAMs with page mode access cycles to get good performance with
no cache.

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