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Path: utzoo!mnetor!uunet!husc6!bbn!gatech!hubcap!"Douglas
From: ogcvax!pase@uunet.uu.net (Douglas M. Pase)
Newsgroups: comp.arch,comp.parallel
Subject: Instruction scheduling on a VLIW machine
Message-ID: <1549@hubcap.UUCP>
Date: 2 May 88 17:49:24 GMT
Sender: fpst@hubcap.UUCP
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Approved: parallel@hubcap.clemson.edu

Is micro-instruction scheduling considered a ``difficult'' problem on VLIW
machines?  If so, why?  Could you please supply some references which would
explain the problems in detail?  (Try to use refs which are commonly available,
e.g. IEEE, ACM, Theo. Comp. Sci., LNCS, etc.)
-- 
Doug Pase  --  ...ucbvax!tektronix!ogcvax!pase  or  pase@cse.ogc.edu (CSNet)