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From: kds@mipos2.UUCP
Newsgroups: comp.arch
Subject: Re: hardware support of reference and change bits
Keywords: page replacement reference bit change bit
Message-ID: <2217@mipos3.intel.com>
Date: 12 May 88 19:17:15 GMT
References: <1458@hubcap.UUCP> <1647@alliant.Alliant.COM> <2081@winchester.mips.COM>
Sender: nobody@mipos3.intel.com
Reply-To: kds@mipos2.UUCP (Ken Shoemaker ~)
Organization: Microprocessor Component Group, Intel Corp., Santa Clara, CA
Path: utzoo!utgpu!water!watmath!clyde!bellcore!faline!thumper!ulysses!andante!princeton!udel!rochester!cornell!uw-beaver!teknowledge-vaxc!sri-unix!husc6!cmcl2!nrl-cmf!ames!oliveb!intelca!mipos3!mipos2!kds
From: kds@mipos2.UUCP
Newsgroups: comp.arch
Subject: Re: hardware support of reference and change bits
Keywords: page replacement reference bit change bit
Message-ID: <2217@mipos3.intel.com>
Date: 12 May 88 19:17:15 GMT
References: <1458@hubcap.UUCP> <1647@alliant.Alliant.COM> <2081@winchester.mips.COM>
Sender: nobody@mipos3.intel.com
Reply-To: kds@mipos2.UUCP (Ken Shoemaker ~)
Lines: 13
Posted: Thu May 12 15:17:15 1988

Using software to change modify/use bits, or even to do TLB refills is not
usually an option on cisc type machines because the time to switch into the
service call is usually quite a bit longer than on something like the mips.
In fact, the mips dedicates some of the user visible general purpose registers
just so they don't have to save them when they want to service, for example,
a TLB refill.  Which isn't to say either method is bad, but just that the
same solution isn't necessarily applicable to the same problem in two different
environments.

You don't have to break many eggs to hate omlets -- Ian Shoales

Ken Shoemaker, Microprocessor Design, Intel Corp., Santa Clara, California
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