Path: utzoo!utgpu!water!watmath!clyde!bellcore!faline!thumper!ulysses!mhuxo!mhuxt!mhuxi!mhuxh!mhuxu!m10ux!rgr
From: rgr@m10ux.UUCP (Duke Robillard)
Newsgroups: comp.arch
Subject: Re: Is the Intel memory model safe from NO-ONE ?!?
Keywords: 386 intel memory protection management model segmented
Message-ID: <578@m10ux.UUCP>
Date: 14 May 88 21:32:07 GMT
References: <1806@obiwan.mips.COM> <2904@omepd> <353@cf-cm.UUCP> <2711@geac.UUCP>
Reply-To: rgr@m10ux.UUCP (Duke Robillard)
Organization: AT&T Bell Labs, Murray Hill
Lines: 21

In article <2711@geac.UUCP> daveb@geac.UUCP (David Collier-Brown) writes:

>  If the segments are invisible to the HLL programmer (usually by
>being "big enough"), they're a win.  The only thing is...
>	16 bits of addressability is visibly too little
>	32 bits has been described as too small
>	36 bits was **FOUND** to be too small, about 10 years ago

Hang on a sec--doesn't the fact that the VAX uses the first two address
bits to determine which page table to use mean that it has Intel-ish
segmentation?  Seems to me that 30 bits has been big enough so far.
Has anyone out there ever written a program that used up a VAX's
virtual memory?




-- 
+------
|       Duke Robillard
|       AT&T Bell Labs           m10ux!rgr@att.UUCP                 
|       Murray Hill, NJ          {backbone!}att!m10ux!rgr