Path: utzoo!attcan!uunet!husc6!bloom-beacon!mit-eddie!ll-xn!ames!lll-tis!lll-winken!lll-crg.llnl.gov!brooks From: brooks@lll-crg.llnl.gov (Eugene D. Brooks III) Newsgroups: comp.arch Subject: Re: Is Shared Memory Necessary? Message-ID: <7331@lll-winken.llnl.gov> Date: 16 May 88 21:44:45 GMT References: <503@xios.XIOS.UUCP> <2676@pdn.UUCP> <674@cernvax.UUCP> <9559@sol.ARPA> <685@thalia.rice.edu> Sender: usenet@lll-winken.llnl.gov Reply-To: brooks@lll-crg.llnl.gov.UUCP (Eugene D. Brooks III) Organization: Lawrence Livermore National Laboratory Lines: 12 In article <685@thalia.rice.edu> retrac@rice.edu (John Carter) writes: >I think that it's currently worth the cost, but I doubt seriously that it'll >be a realistic approach as we try to increase the number of processors beyond >several dozen. A shared (hardware) memory that needed to handle thousands of Experience with the 30 CPU Sequent Symmetry system indicates that the limit for bus based systems with the right copy/back cache protocol is beyond 30 processors. Experience with the Cerberus multiprocessor simulator indicates that a non-bus shared memory system can be very successfully used with processor counts of several hundred and beyond without fancy fetch-and-op support in the memory subsystem. Give me a couple hundred Cray class processors and I would be happy for at least a week. :-)