Path: utzoo!utgpu!water!watmath!clyde!att!pacbell!ames!amdcad!sun!pitstop!sundc!seismo!uunet!mcvax!ukc!stl!stc!idec!camcon!anc
From: anc@camcon.uucp (Adrian Cockcroft)
Newsgroups: comp.arch
Subject: Re: negative addresses
Summary: also the transputer
Message-ID: <1501@titan.camcon.uucp>
Date: 20 May 88 10:06:47 GMT
References: <2393@uvacs.CS.VIRGINIA.EDU> <21541@amdcad.AMD.COM> <4000@ayumi.stars.flab.fujitsu.JUNET>
Organization: Cambridge Consultants Ltd., Cambridge, UK
Lines: 23

In article <4000@ayumi.stars.flab.fujitsu.JUNET>, yuhara@ayumi.stars.flab.fujitsu.JUNET (== M. Yuhara ==) writes:
> In article <2393@uvacs.CS.VIRGINIA.EDU>, wulf@uvacs.CS.VIRGINIA.EDU (Bill Wulf) writes:
> > Has anyone ever seen a machine with "negative addresses", that is, one
> > where the address space is -2**31..2**31-1 rather than 0..2*32-1??
> 
> Yes, yes.
> TRON chip deals an address as an signed integer.

The Inmos Transputer family also has a signed address space. The top of
the address space is at 7FFFFFFF which is where it boots from ROM, the
bottom of the address space is at 80000000 which is where the on-chip RAM
and memory mapped link engines sit. It has a special instruction "mint" for
doing a quick load of the minimum integer (80000000). Because addresses are
signed you can use normal integer comparison instructions so the instruction
set is simplified. The code generated is usually totally position
independent (the instruction set is designed that way) so absolute addresses
are only needed for talking to memory mapped hardware.

-- 
  |   Adrian Cockcroft anc@camcon.uucp  ..!seismo!mcvax!ukc!camcon!anc
-[T]- Cambridge Consultants Ltd, Science Park, Cambridge CB4 4DW,
  |   England, UK                                        (0223) 358855
      (You are in a maze of twisty little C004's, all alike...)