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From: mac3n@babbage.acc.virginia.edu (Alex Colvin)
Newsgroups: comp.misc,comp.arch
Subject: Re: Japanese 32-bit micro can be a 68020 or 80386
Summary: emulators / interpreters
Message-ID: <313@babbage.acc.virginia.edu>
Date: 20 May 88 23:04:58 GMT
References: <2006@sugar.UUCP> <2248@mipos3.intel.com>
Organization: University of Virginia
Lines: 14

> set on yet another general purpose machine.  But unless the new machine
> risc or microcodable one) were significantly faster then both
> target machines, it couldn't be faster than the custom hardware implementation
> of the specific machine.

There used to be a PDP-9 at Dartmouth, as well as a pile of DG Novas.  It
was believed that the 9, which was a faster machine, could emulate a Nova
faster than the Nova could run.  On the other hand, Novas are almost
microcode and good at this sort of thing, so a Nova might be able to
emulate a 9 faster than the 9 could run.  By going through more emulation,
you ought to be able to get asymptotic speedups ;-|

As for writeable control stores, many of the early RISC work was done by
"microcode refugees", who found that the could do better by just compiling
directly to microcode and making that the instruction set.