Path: utzoo!attcan!uunet!seismo!sundc!pitstop!sun!decwrl!pyramid!leadsv!excelan!chuck From: chuck@excelan.UUCP (Chuck Kollars) Newsgroups: comp.protocols.tcp-ip.ibmpc Subject: "host-based" vs. "front-end-processor" PC network interfaces Keywords: FEP onboard outboard Message-ID: <361@lalk.excelan.UUCP> Date: 13 May 88 01:34:23 GMT Reply-To: chuck@excelan.UUCP (Chuck Kollars) Organization: Excelan Inc., San Jose, CA Lines: 60 Currently TCP/IP protocols can be executed either in the PC, or on the NIC. The "host-based" and "front-end-processor" architectures each have their advantages and their disadvantages. Performance, reliability, usability, and cost of a product depend on the implementation more than the architecture. Some potential advantages of the Front End Processor architecture: o offload packet handling from host CPU o reduce host memory requirements o larger data holding buffers and sliding window sizes o shorter latency between received packet and acknowledgement o partially offload keystroke processing o many simultaneous connections Some of these advantages are most relevant to multiprocessor (ex: OS/2) or multiuser (ex: Xenix) systems. Others are especially relevant to systems with memory address space restrictions (ex: DOS). The interface to the transport layer is a convenient place for separating host and onboard portions. Applications using an interface like SOCK_STREAM sockets can pass their data to the network with simple read() and write() calls. Separation between the host and onboard portions is especially clean for "stream" or "pipeline" style transport layers (ex:TCP, named pipes). While Excelan did not invent the Front End Processor approach and does not restrict its product line to FEP configurations, "Excelan style" is sometimes used to mean "outboard" or "onboard" protocols. The EXOS205 Network Interface Card for PC's is usually configured for FEP operation. The card uses a shared memory interface because of problems with DMA generic to PC's. The choice of host-based or FEP architecture is less final in the world of PC's than usual (at least for vendors and other nuts-and-bolts developers). Most "smart" NIC's use an Intel 8xx86 processor chip. Since the instruction set is identical to the one in the PC itself, it's particularly easy to move modules of code back and forth between the host and the board. "Host-based" vs. "front-end-processor" has been discussed to death for years on the network, in the literature, and elsewhere. This posting is intended to provide a brief introduction to the topic for people who are new to LAN's, not to rekindle old religious wars. It was prompted by peripheral references to the FEP vs. Host-Based issue in some recent articles in this newsgroup: in <8804281612.AA14022@vax.ftp.com> >...TCP/IP currently resides on their...card... ...SLIP...would >require moving it off the card... in <21523@amdcad.AMD.COM> >...the 286 on an AT beats the 186 in Excelan etc style boards. in <8805110429.AA03980@vax.ftp.com> >...classic problem with outboard protocol implementations >is that they are complicated to talk to. -- Chuck Kollars, Excelan, Inc. (chuck@excelan.UUCP) mabell: (408) 434-7434 Internet: mtxinu!excelan!chuck@ucbvax.Berkeley.COM telex: 176610 uucp: ...!{mtxinu,leadsv,cae780}!excelan!chuck fax: (408) 434-2310 post: Excelan, 2180 Fortune Drive, San Jose CA, 95131